k usb to atapi kawasaki lsi preliminary kawasaki lsi 2570 north first street suite 301 san jose, ca 95131 tel: (408) 570-0555 fax: (408) 570-0567 www.klsi.com 1 ver. 1 ..0 description t he KL5KUSB110from kawasaki , is a low cost, high speed universal serial bus (usb) to atapi/ide controller. it's 16 bit risc processor and built in bios rom translates usb atapi host commands to a wide variety ide storage devices such as, hdd, fd, cd-rom, cd-wr, zip drives ls120 drives. the KL5KUSB110's unique interface architecture to external serial flash eeprom allows flexibility to upgrade and support a variety of ide/atapi based disk drives, without changing peripheral hardware. this is accomplished when new functions are uploaded into the serial eeprom from the usb host pc. the KL5KUSB110's memory/gpio bi-directional port supports both 8 and 16 bit pio modes. the usb port supports up to the maximum 12 mbits/sec usb transfer rate. all usb protocol modes are supported; isochronous ( up to 1024 bytes ), bulk, interrupt and control. the KL5KUSB110 uses ide as a physical interface, but commands to the external disk can be either ide or atapi commands. ata-1 ,2&3 based disk drives are also supported. the KL5KUSB110 device supports a wide variety of disk drive solutions due to it's maximum disk drive throughput rate up to 1mbytes/sec and comprehensive pnp usb/atapi drivers. features advanced 16 bit processor for usb transaction processing and control data processing compliant with the usb 1.0/1.1 (universal serial bus) compatible to a wide variety of storage devices. data transfer in pio mode, 8 or 16 bit plug and play compatible maximum disk throughput up to 1mbytes/sec i 2 c interface utilizes low cost external crystal circuitry 3k x 8 internal general purpose buffer. usb host device drivers available suspend, resume and low power modes 3.3 vdd operation single-chip solution in a 100 pin lqfp block diagram ck dio pll & clock generator 16 bit address / data bus 16 bit processor serial interface engine ram (3kb) timer 0 usb interface mask rom eeprom serial interface timer 1 data + data - x1 x2 watchdog timer i 2 c dio ck atapi / ide interface ide 44 pin a1-a3 cs0-cs1 dasp rd wr io rdy io 8/16 reset dd0 - dd15 5v logic
k usb to atapi kawasaki lsi preliminary kawasaki lsi 2570 north first street suite 301 san jose, ca 95131 tel: (408) 570-0555 fax: (408) 570-0567 www.klsi.com 2 ver. 1 ..0 function description 16 bit processor the integrated 16 bit processor serves as a micro controller for usb peripherals. the processor can execute approximately five million instructions per second. with this processing power it allows the design of intelligent peripherals that can process data prior to passing it on to the host pc, thus improving overall performance of the system. the masked rom in the this device or external memory contains a specialized instruction set that has been designed for highly efficient coding of processing algorithms and usb transaction processing. the 16-bit processor is designed for efficient data execution by having direct access to the ram buffer, external memory, i/o interfaces, and all the control and status registers the processor supports prioritized vectored hardware interrupts and has as many as 240 software interrupt vectors. the processor provides six addressing modes, supporting memory-to-memory, memory-to- register, register-to-register, immediate-to-register or immediate-to-memory operations. register, direct, immediate, indirect, and indirect indexed addressing modes are supported. in addition, there is an auto-increment mode in which a register, used as an address pointer is automatically incremented after each use, making repetitive operations more efficient both from a programming and a performance standpoint. the processor features a full set of program control, logical, and integer arithmetic instructions. all instructions are sixteen bits wide, although some instructions require operands, which may occupy another one or two words. several special ? short immediate? instructions are available, so that certain frequently used operations with small constant operand will fit into a 16-bit instruction. ram buffer the usb controller contains internal buffer memory. the memory is used to buffer data and usb packets and accessed by the 16 bit processor and the sie. usb transactions are automatically routed to the memory buffer. the 16-bit processor has the ability to set up pointers and block sizes in buffer memory for usb transactions. data is read from the interface and is processed and packetized by the 16-bit i/o processor. memory buffer can also be configured as ?double port buffer? multiple sector data buffer, 512 bytes or 1024 bytes simultaneously transferred from disk to usb port and via versa rom 3kx16 internal mask bios rom, supports usb to atapi/ide macros, usb functions, serial eeprom programmability, dram, uart, and other functions. executable code can run from either internal ram, rom, or external rom. also, available extended external sram or dram to store disk cash data.
k usb to atapi kawasaki lsi preliminary kawasaki lsi 2570 north first street suite 301 san jose, ca 95131 tel: (408) 570-0555 fax: (408) 570-0567 www.klsi.com 3 ver. 1 ..0 ide port 8 or 16 bits, data port, supports master/slave multiple disks . either atapi or ide commands, supports ata- 1 ,2 &3 standards. max disk operation throughput rate is up to 1 mbytes/sec wdm atapi/ide drivers development kit includes generic pnp usb mini-port driver, atapi driver for windows 98 /nt2000 and mac8.5 for ide disk drive class devices . development time is significantly reduced. pll clock generator the pll circuitry is provided to generate the internal 48mhz clock requirements. this circuitry is designed to allow use of a low cost 12 mhz external crystal which is connected to the usb3 pins x1 and x2. if an external 12 mhz clock is available in the application, it may be used in lieu of the crystal circuit and connected directly to the x1 input pin. usb interface the usb controller meets the universal serial bus (usb) specification ver 1.0 and 1.1. the transceiver is capable of transmitting and receiving serial data at the usb?s full speed, 12 mbits/sec data rate. the driver portion of the transceiver is differential, while the receive section is comprised of a differential receiver and two single ended receivers. internally, the transceiver interfaces to the sie logic. externally, the transceiver connects to the physical layer of the usb. uart serial interface the uart can be configured for a wide selection of baud rates, 300 to 230.4 k baud, and support a set of control signals. each uart provides a means for external serial devices to access the usb. serial eeprom support the usb controller serial interface is used to provide access to external eeprom?s. the interface can support a variety of serial eeprom formats. development kit for all of its products, kawasaki offers development kits ( dvks), usb to ide reference design board, training, and integration assistance from an experienced staff of engineers . by using the dvks, kawasaki customers can have a working usb product within 3 weeks. the following items are included in the KL5KUSB110development kit: wdm windows 98/nt2000 and mac8.5 drivers, and atapi to usb driver object code, optional source code usb to atapi/ide protocol translator firmware source code example pnp usb atapi disk drive demo object code, optional source code examples is available application notes
k usb to atapi kawasaki lsi preliminary kawasaki lsi 2570 north first street suite 301 san jose, ca 95131 tel: (408) 570-0555 fax: (408) 570-0567 www.klsi.com 4 ver. 1 ..0 electrical characteristics absolute maximum ratings parameter symbol ratings unit v dd5 -0.6 to 6.0 v supply voltage v dd -0.3 to 4.0 v -0.6 to v dd5 +0.6 v v in (normal) -0.3 to v dd +0.3 v input voltage v in (5v tolerant) -0.3 to 7.3 v dc output current i out 30 ma storage temperature tstg -55 to 125 ** c **plastic package dc characteristics and conditions (v dd5 @ 3v .3v) value symbol parameter condition min typ max unit v dd5 supply voltage - 3.0 3.3 3.6 v v ih input high voltage cmos 2.15 - - v v il input low voltage cmos - - 0.95 v ttl schmitt 1.32 1.75 v v+ input high voltage cmos schmitt 2.17 2.65 v ttl schmitt 0.45 0.86 - v v- input low voltage cmos schmitt 0.50 1.03 - v ttl schmitt 0.25 - - v v h hysteresis voltage cmos schmitt 0.56 - - v i ih input high current v in = v dd5 -10 - 10 m a i il input low current v in = v ss -10 - 10 m a v oh output high voltage i oh = -4ma 2.4 - - v v ol output low voltage i ol = 4ma - - 0.4 v v ol =v dd5 -10 - 10 m a i oz 3-state leakage current v in =v ss -12 -34 -100 m a *idds is design dependent august 1998 copyright 1998 kawasaki lsi printed in u.s.a kawasaki lsi assumes no responsibility or liability for (1) any errors or inaccuracies contained in the information herein and (2) the use of the information or a portion thereof in any application, including any claim for (a) copyright or patent infringement or (b) direct, indirect, special or consequential damages. there are no warranties extended or granted by this document. the information herein is subject to change without notice form kawasaki lsi
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